CSC 221: Computer Organization, Spring 2009

Practice Exam 2

The exam will be open-book, so that you don't have to memorize the ASCII table or the details of the Pep/8 architecture.

1. With a two-address architecture, most machine instructions take two addresses as operands. An instruction such as

   add     X, Y
   

   says to add the value stored at address Y to the value at address X, leaving the result in X. That is, it is roughly equivalent to the C++ statement X += Y;. How many memory reads are required to fetch and execute this instruction on a two-address architecture (where X and Y are direct-mode operands)?

   How many memory writes are required?

   Give an equivalent sequence of instructions for the Pep/8 architecture, and tell how many memory reads and writes are required for it.

2. Convert the following C++ program to Pep/8 assembly language:

   #include <iostream>
   using namespace std;
   
   int n;
   
   int f(int x)
   {
       if ((x & 1) == 1) {
           return (3 * x) + 1;
       } else {
           return x / 2;
       }
   }
   
   int main()
   {
       cin >> n;
       while (n > 1) {
           n = f(n);
           cout << n << endl;
       }
   }
   
   

3. Convert the following C++ program to Pep/8 Assembly Language:

   #include <iostream>
   using namespace std;
   
   int a, b;
   
   int main() {
     cin >> a;
     cin >> b;
     b += a;
     a = b - a;
     cout << a;
     cout << b;
   }
   

4. Convert the following Pep/8 program to an equivalent program in C++:

   newLine: .EQUATE 0x000A
            BR      main
   x:       .WORD   1
   y:       .WORD   2
   z:       .WORD   3
   c:       .BYTE   4
   main:    DECI    y,d
            LDA     y,d
            ASLA
            STA     x,d
            ASLA
            ASLA
            ADDA    x,d
            ADDA    z,d
            STA     x,d
            DECO    x,d
            CHARO   newLine,i
            DECO    y,d
            LDA     z,d
            ORA     0x0030,i
            STBYTEA c,d
            CHARO   c,d
            STOP
            .END
   

   What is the output of the above program if the user enters 42?

5. Consider the boolean formula (a + b') ^. (b' + c') ^. (a' + c).

   1. Construct a truth table for this formula.
   2. Draw a circuit using AND, OR, and NOT gates with inputs a, b, and c, whose output is the value of this formula.
   3. Draw an equivalent circuit using as few gates as possible.

6. Convert the following Pep/8 program to an equivalent program in C++:

           BR      main
   n:      .BLOCK  2
   fact:   .WORD   1
   
   i:      .EQUATE 0
   p:      .EQUATE 2
   mul:    SUBSP   4, i
           LDA     0, i
           STA     p, s
           STA     i, s
   L3:     CPA     n, d
           BREQ    L4
           LDA     p, s
           ADDA    fact, d
           STA     p, s
           LDA     i, s
           ADDA    1, i
           STA     i, s
           BR      L3
   L4:     LDA     p, s
           STA     fact, d
           RET4
   
   main:   LDA     7, i
           STA     n, d
   L1:     CPA     0, i
           BREQ    L2
           CALL    mul
           LDA     n, d
           SUBA    1, i
           STA     n, d
           BR      L1
   L2:     DECO    fact, d
           CHARO   '\n', i
           STOP
           .END
   

7. Modify the above program so that the subroutine mul doesn't use the global variables n and fact; instead, it should take the values of n and fact as parameters, and produce the new value of fact as a return value. Show both the modifications necessary to mul and to main.

8. Design a combinational network that implements a two-bit comparator. This is a component that takes two pairs of input signals, a₁a₀ and b₁b₀, and produces one output line, labeled GT, which is 1 exactly when the binary number a₁a₀ is greater than the binary number b₁b₀. For example, if the inputs are 10 and 01, then the output should be 1; if the inputs are 10 and 10, or 01 and 10, then the output should be 0. Try to use as few logic gates as possible.

9. A fancier version of the two-bit comparator would have three outputs, say GT, EQ, and LT, which reflect whether the first input (a₁a₀) is respectively greater than, equal to, or less than the second (b₁b₀). Show how to use one or more copies of this component (NOTE: you do not need to design this component, just draw a box with the appropriate input and output lines), plus a few logic gates, to construct a four-bit comparator; that is, a component which takes two groups of four input signals, a₃a₂a₁a₀ and b₃b₂b₁b₀, and produces a 1 on exactly one of the three outputs GT, EQ, and LT depending on whether a>b, a=b, or a<b (where a is the value given by the unsigned binary number a₁a₀, and b is given by b₁b₀).

DePauw University, Computer Science Department, Spring 2009
Maintained by Brian Howard (bhoward@depauw.edu). Last updated